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Amir Hossein Binesh

CE Department, Sharif Uni. of Tech., Tehran, Iran

ah.binesh@ce.sharif.edu


interests

Linux Kernel
Hardware Security
Storage Systems
Memory Systems
Computer Firmware
Device Drivers
Deep Learning
Reinforcement Learning

Skills

Programming Tools and Languages:
C/C++
GNU Linux
OOP, Design Patterns
Git
Python
Docker
SQL
MQTT
PHP
Verilog
Assembly

Embedded Systems:
Arduino Framework
Free RTOS
Platform IO
ESP32
Raspberry Pi
Nvidia Jetson


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Education

Sharif University of Technology, Tehran, Iran
2023 - Present

MSc in Computer Engineering (Computer Architecture) @ CE Department

Thesis: Improving Performance of Flash Translation Layer for Zoned Namespace SSDs based on Workload Characterization

Supervisor: Dr. Hossein Asadi


Sharif University of Technology, Tehran, Iran
2022

BSc in Electrical Engineering

Project: Precise indoor positioning using UWB technology

Supervisor: Dr. Amin Rezaeizadeh


Experiences

SSEC Lab, Sharif University of Technology
July 2023 – Present

Role: Team Lead & Embedded Linux Developer

Project: Smart IoT Gateway for Emergency Vehicles

Skills: Arm64 Linux, Kernel Customization, C++, Rockchip SOC, Python, Sim7600 LTE & GPS, CAN Bus, MQTT, Asterisk, BLE, SQL


MAPNA MD2
Aug 2022 – Aug 2023

Role: IoT & Machine Vision Engineer

  • PPE violation detection: Data collection, cleaning, labeling, training models (YOLOv5 & YOLOX)
  • Human Pose Estimation using Detectron2

Skills: Python, Linux, Docker, Jetson, Deep Learning, Torch


Nove
Feb 2020 – Aug 2022

Role: IoT R&D Expert

  • DP-Lamp Smart Air Purifier (ESP32)
  • NOVE IoTin IoT Platform (ESP32)

Skills: Embedded C++, ESP32, Teensy, Raspberry Pi, FreeRTOS, SPI, I2C, TCP/UDP


Other Projects

CPU power monitoring in Android

Power monitoring and CPU frequency controlling in Android kernel using Quectel smart evb-kit development board over Android Debug Bridge.


ZNS SSD Manipulation with libZBD, libZBC, libNVME

Developed necessary flash manipulation functions for block operations specific to Zoned Namespace SSD (ZNS). Tested performance of different user level libraries including libZBC, libZBD and libNVME on ZNS SSD Emulator NVMEVirt.


VLSI power analysis using Synopsis Power Compiler and HSpice

Designed a Carry Look Ahead adder and a Ripple Carry Adder in Verilog using only NAND gates. Simluated the NAND gate with Specific manufacturing component in HSpice to calcuate rise/fall times and power consumption of the NAND gate . Used simulation results to customize components library in Design Compiler. Simulated both full adder circuits in ModelSIM for signal activity estimations and finally simulated the circuit in Power Compiler to calculate dynamic (switching) power consumption.


IO Caching on RAMDisk

Implemented a high performance storage system for data intensive computing. Mounted 4 SSDs in RAID 0 as the backend storage using linux mdadm, implemented a 2% RAMDisk IO cache using linux BRD and OpenCAS for better performance and SSD lifetime improvment.


Simulation of MIPS multi-cycle processor in ModelSim using Verilog

Firmware development for digital stethoscope

Bluetooth A2DP audio streamer with I2C MEMS microphone, I2C LED display, battery management and deep sleep mode, OTA update and IIR real-time filter.


Firmware development for a connected chamber

Temperature and humidity-controlled chamber for concrete material heat and moisture transfer analysis using ESP32, 16 DHT22 sensors over multiplexers, controlling environmental variables using 7 relays over shift registers, 2.8-inch SPI LCD + online logging over WiFi to PHP server